Field
The disclosed embodiments generally relate to techniques for improving performance in computer systems. More specifically, the disclosed embodiments relate to the design of a processor, which generates prefetches for data streams with recurring access patterns having multiple strides.
Related Art
As the gap between processor speed and memory performance continues to grow, prefetching is becoming an increasingly important technique for improving computer system performance. Prefetching involves pulling cache lines from memory and placing them into a cache before the cache lines are actually accessed by an application. This prevents the application from having to wait for a cache line to be retrieved from memory and thereby improves computer system performance.
Conventional stream data prefetchers, such as those implemented in Oracle Corporation's current generation of SPAR™ processors, can only generate prefetches for data streams having a single constant stride, wherein a stride indicates a distance between successive memory accesses in a data stream. However, many important applications generate data stream access patterns with multiple strides. These multi-stride streams act to confound a conventional stream prefetcher and render it largely ineffective.
Hence, what is needed is a prefetcher that generates prefetches for data streams having multiple strides.